Bosch PPP6 B8 Series Manual de servicio

HC12Microcontrollersfreescale.comMC68Hc912D60AMC68HC912D60CMC68HC912D60PTechnical DataMC68HC912D60A/DRev. 3.108/2005

Table of ContentsTechnical Data MC68HC912D60A — Rev. 3.110 Table of Contents Freescale Semiconductor9.6 Resets. . . . . . . . . . . . . . . . . . . .

Flash MemoryTechnical Data MC68HC912D60A — Rev. 3.1100 Flash Memory Freescale SemiconductorFEESWAI — Flash EEPROM Stop in Wait Control0 = Do not halt

Flash MemoryProgramming the Flash EEPROMMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Flash Memory 101 7.7.2 Normal OperationThe Fla

Flash MemoryTechnical Data MC68HC912D60A — Rev. 3.1102 Flash Memory Freescale SemiconductorUse this step-by-step procedure to program a row of Flash

Flash MemoryTechnical Data MC68HC912D60A — Rev. 3.1103 Flash Memory Freescale Semiconductor7.9 Erasing the Flash EEPROMThe following sequence demons

Flash MemoryTechnical Data MC68HC912D60A — Rev. 3.1104 Flash Memory Freescale Semiconductor7.11 Flash protection bit FPOPENThe FPOPEN bit is located

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 105 Technical Data — MC68HC912D60ASection 8. EEPROM Memory8.1 Contents8.

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1106 EEPROM Memory Freescale Semiconductorprogram/erase voltage. Programming voltage is derived fr

EEPROM MemoryEEPROM Programmer’s ModelMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 107 8.4 EEPROM Programmer’s Model

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1108 EEPROM Memory Freescale SemiconductorA steady internal self-time clock is required to provide

EEPROM MemoryEEPROM Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 109 EEDIV[9:0] — Prescaler dividerLo

Table of ContentsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Table of Contents 11 12.2 Introduction. . . . . . . . . . . . . . . .

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1110 EEPROM Memory Freescale SemiconductorBits[7:4] are loaded at reset from the EEPROM SHADOW wor

EEPROM MemoryEEPROM Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 111 FPOPEN — Opens the Flash Block f

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1112 EEPROM Memory Freescale SemiconductorPrevents accidental writes to EEPROM. Read anytime. Writ

EEPROM MemoryEEPROM Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 113 .BULKP — Bulk Erase Protection0

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1114 EEPROM Memory Freescale SemiconductorERASE — Erase Control0 = EEPROM configuration for progra

EEPROM MemoryProgram/Erase OperationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 115 8.6 Program/Erase OperationA pro

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1116 EEPROM Memory Freescale Semiconductor8.8 Programming EEDIVH and EEDIVL RegistersThe EEDIVH a

EEPROM MemoryProgramming EEDIVH and EEDIVL RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor EEPROM Memory 117 EEPROM location a

EEPROM MemoryTechnical Data MC68HC912D60A — Rev. 3.1118 EEPROM Memory Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Resets and Interrupts 119 Technical Data — MC68HC912D60ASection 9. Resets and Interrupt

Table of ContentsTechnical Data MC68HC912D60A — Rev. 3.112 Table of Contents Freescale Semiconductor16.2 Introduction. . . . . . . . . . . . . . . .

Resets and InterruptsTechnical Data MC68HC912D60A — Rev. 3.1120 Resets and Interrupts Freescale Semiconductormaskable. The remaining sources are mask

Resets and InterruptsLatching of InterruptsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Resets and Interrupts 121 9.4 Latching of I

Resets and InterruptsTechnical Data MC68HC912D60A — Rev. 3.1122 Resets and Interrupts Freescale SemiconductorTable 9-1. Interrupt Vector MapVector Ad

Resets and InterruptsInterrupt Control and Priority RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Resets and Interrupts 123

Resets and InterruptsTechnical Data MC68HC912D60A — Rev. 3.1124 Resets and Interrupts Freescale SemiconductorWrite only if I mask in CCR = 1 (interru

Resets and InterruptsResetsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Resets and Interrupts 125 9.6.2 External Reset The CPU dist

Resets and InterruptsTechnical Data MC68HC912D60A — Rev. 3.1126 Resets and Interrupts Freescale Semiconductor9.7 Effects of ResetWhen a reset occurs

Resets and InterruptsRegister StackingMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Resets and Interrupts 127 If the MCU comes out of

Resets and InterruptsTechnical Data MC68HC912D60A — Rev. 3.1128 Resets and Interrupts Freescale Semiconductorrequired to complete the instruction. So

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor I/O Ports with Key Wake-up 129 Technical Data — MC68HC912D60ASection 10. I/O Ports with

Table of ContentsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Table of Contents 13 18.4 Functional Description . . . . . . . . . .

I/O Ports with Key Wake-upTechnical Data MC68HC912D60A — Rev. 3.1130 I/O Ports with Key Wake-up Freescale SemiconductorPull-up/down status is selecte

I/O Ports with Key Wake-upKey Wake-up and Port RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor I/O Ports with Key Wake-up 131

I/O Ports with Key Wake-upTechnical Data MC68HC912D60A — Rev. 3.1132 I/O Ports with Key Wake-up Freescale SemiconductorRead and write anytime.WI2CE —

I/O Ports with Key Wake-upKey Wake-up and Port RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor I/O Ports with Key Wake-up 133

I/O Ports with Key Wake-upTechnical Data MC68HC912D60A — Rev. 3.1134 I/O Ports with Key Wake-up Freescale SemiconductorRead and write anytime.Each fl

I/O Ports with Key Wake-upKey Wake-Up Input FilterMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor I/O Ports with Key Wake-up 135 this t

I/O Ports with Key Wake-upTechnical Data MC68HC912D60A — Rev. 3.1136 I/O Ports with Key Wake-up Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 137 Technical Data — MC68HC912D60ASection 11. Clock Functions11.1 Cont

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1138 Clock Functions Freescale Semiconductor11.3 Clock SourcesA compatible external clock signa

Clock FunctionsPhase-Locked Loop (PLL)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 139 Figure 11-1. Internal Clock R

Table of ContentsTechnical Data MC68HC912D60A — Rev. 3.114 Table of Contents Freescale Semiconductor22.2 Significant changes from the MC68HC912D60 (n

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1140 Clock Functions Freescale SemiconductorFigure 11-2. PLL Functional DiagramThe PLL may be us

Clock FunctionsAcquisition and Tracking ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 141 11.5 Acquisition and

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1142 Clock Functions Freescale Semiconductorfor the base clock. See Clock Divider Chains. If the

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 143 11.6 Limp-Hom

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1144 Clock Functions Freescale SemiconductorVCO clock at its minimum frequency, f VCOMIN, is pro

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 145 values before

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1146 Clock Functions Freescale SemiconductorTherefore, if the MCU is powered up without an exter

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 147 During this po

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1148 Clock Functions Freescale Semiconductor11.6.3 STOP Exit and Fast STOP RecoveryStop mode is

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 149 Figure 11-5. S

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor List of Figures 15 Technical Data — MC68HC912D60AList of FiguresFigure Title Page1-1 MC

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1150 Clock Functions Freescale Semiconductor11.6.5 Executing the STOP instruction without Limp

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 151 improper EXTAL

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1152 Clock Functions Freescale SemiconductorEach time the 13-stage counter reaches a count of 40

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 153 11.6.9 Pseudo

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1154 Clock Functions Freescale Semiconductor11.6.11 Pseudo-STOP exit without Limp Home mode, cl

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 155 ..Table 11-1.

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1156 Clock Functions Freescale Semiconductor11.6.15 PLL Register DescriptionsRead anytime, writ

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 157 Read anytime,

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1158 Clock Functions Freescale SemiconductorRead and write anytime. Exceptions are listed below

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 159 ACQ — Not in A

List of FiguresTechnical Data MC68HC912D60A — Rev. 3.116 List of Figures Freescale Semiconductor14-3 8-Bit Pulse Accumulators Block Diagram . . . . .

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1160 Clock Functions Freescale SemiconductorRead and write anytime. Exceptions are listed below

Clock FunctionsLimp-Home and Fast STOP Recovery modesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 161 Read and write

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1162 Clock Functions Freescale Semiconductor11.7 System Clock Frequency formulasSee Figure 11-6

Clock FunctionsClock Divider ChainsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 163 Figure 11-6. Clock Generation Ch

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1164 Clock Functions Freescale Semiconductorthe transition, the clock select output will be held

Clock FunctionsClock Divider ChainsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 165 Figure 11-8. Clock Chain for ECT

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1166 Clock Functions Freescale SemiconductorFigure 11-9. Clock Chain for MSCAN, SPI, ATD0, ATD1

Clock FunctionsReal-Time InterruptMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 167 In addition, windowed COP operati

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1168 Clock Functions Freescale Semiconductor11.12 Clock Function RegistersAll register addresse

Clock FunctionsClock Function RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 169 RTR2, RTR1, RTR0 — Real-Time

List of FiguresMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor List of Figures 17 20-8 Multiplexed Expansion Bus Timing Diagram . . .

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1170 Clock Functions Freescale SemiconductorCME — Clock Monitor EnableRead and write anytime.If

Clock FunctionsClock Function RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Clock Functions 171 FCMCOP — Force Clock Monitor

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1172 Clock Functions Freescale SemiconductorDISR — Disable Resets from COP Watchdog and Clock Mo

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1173 Clock Functions Freescale SemiconductorAlways reads $00. Writing $55 to this address is the

Clock FunctionsTechnical Data MC68HC912D60A — Rev. 3.1174 Clock Functions Freescale Semiconductor

OscillatorContentsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 175 12.1 Contents12.2 Introduction. . . . . . . . . . . .

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1176 Oscillator Freescale SemiconductorLevel Control circuit to provide a lower power oscillator than

OscillatorMC68HC912D60A Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 177 Figure 12-1. MC68HC912D6

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1178 Oscillator Freescale Semiconductor• Minimize Capacitance to VSS on EXTAL pin — The Colpitts osci

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 179 12.4 MC68HC912

List of FiguresTechnical Data MC68HC912D60A — Rev. 3.118 List of Figures Freescale Semiconductor

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1180 Oscillator Freescale SemiconductorFigure 12-2. MC68HC912D60C Colpitts Oscillator ArchitectureThe

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 181 • The bias curr

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1182 Oscillator Freescale Semiconductor12.4.1.2 Internal Parasitic ReductionAny oscillator circuit’s

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 183 12.4.1.4 Input

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1184 Oscillator Freescale Semiconductor12.4.2 MC68HC912D60C Oscillator Circuit Specifications12.4.2.

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 185 NRM measurement

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1186 Oscillator Freescale Semiconductor12.4.2.3 Optimizing Component ValuesThe maximum ESR possible

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 187 • VDDPLL Settin

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1188 Oscillator Freescale Semiconductorvariation or particle contamination).3. Within this range, cho

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 189 Table 12-1. MC6

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor List of Tables 19 Technical Data — MC68HC912D60AList of TablesTable Title Page1-1 Devic

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1190 Oscillator Freescale SemiconductorMaximum ESR vs. EXTAL–XTAL capacitor value, 8MHz resonatorsShu

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 191 12.4.4 MC68HC9

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1192 Oscillator Freescale SemiconductorFigure 12-3. MC68HC912D60C Crystal with DC Blocking CapacitorA

OscillatorMC68HC912D60C Colpitts Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 193 12.4.5 MC68HC9

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1194 Oscillator Freescale Semiconductor• Minimize XTAL and EXTAL routing lengths to reduce EMC issues

OscillatorMC68HC912D60P Pierce Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 195 Figure 12-4. MC68

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1196 Oscillator Freescale Semiconductor• The input ESD resistor from EXTAL to the gate of the oscilla

OscillatorMC68HC912D60P Pierce Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 197 lower amplitude f

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1198 Oscillator Freescale Semiconductor12.5.1.3 Bias Current Process OptimizationFor proper oscillat

OscillatorMC68HC912D60P Pierce Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 199 12.5.2 MC68HC912

List of TablesTechnical Data MC68HC912D60A — Rev. 3.120 List of Tables Freescale Semiconductor14-3 Prescaler Selection. . . . . . . . . . . . . . . .

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1200 Oscillator Freescale SemiconductorNRM measurement techniques can also generate misleading result

OscillatorMC68HC912D60P Pierce Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 201 12.5.2.3 Optimiz

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1202 Oscillator Freescale Semiconductor• VDDPLL Setting — The Voltage applied to the VDDPLL pin (Logi

OscillatorMC68HC912D60P Pierce Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 203 variation or part

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1204 Oscillator Freescale SemiconductorTable 12-2. MC68HC912D60P EXTAL–VSS, XTAL–VSS Capacitor Values

OscillatorMC68HC912D60P Pierce Oscillator SpecificationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Oscillator 205 Maximum ESR vs. E

OscillatorTechnical Data MC68HC912D60A — Rev. 3.1206 Oscillator Freescale Semiconductor12.5.4 MC68HC912D60P GuidelinesProper and robust operation of

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 207 Technical Data — MC68HC912D60ASection 13. Pulse Width Modulat

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1208 Pulse Width Modulator Freescale Semiconductorpossible to know where the count is with

Pulse Width ModulatorIntroductionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 209 Figure 13-2. Block Diagram o

List of TablesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor List of Tables 21 19-12 Tag Pin Function. . . . . . . . . . . . . . . . .

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1210 Pulse Width Modulator Freescale SemiconductorFigure 13-3. PWM Clock Sources13.3 PWM

Pulse Width ModulatorPWM Register DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 211 CON23 — Concaten

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1212 Pulse Width Modulator Freescale SemiconductorPCKB2 – PCKB0 — Prescaler for Clock B Cl

Pulse Width ModulatorPWM Register DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 213 PCLK0 — PWM Chan

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1214 Pulse Width Modulator Freescale SemiconductorSetting any of the PWENx bits causes the

Pulse Width ModulatorPWM Register DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 215 PWEN0 — PWM Chan

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1216 Pulse Width Modulator Freescale SemiconductorPWSCNT0 is a down-counter that, upon rea

Pulse Width ModulatorPWM Register DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 217 Read and write a

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1218 Pulse Width Modulator Freescale SemiconductorRead and write anytime.The value in the

Pulse Width ModulatorPWM Register DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 219 The value in eac

List of TablesTechnical Data MC68HC912D60A — Rev. 3.122 List of Tables Freescale Semiconductor

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1220 Pulse Width Modulator Freescale SemiconductorRDPP — Reduced Drive of Port P0 = All po

Pulse Width ModulatorPWM Register DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pulse Width Modulator 221 PORTP can be rea

Pulse Width ModulatorTechnical Data MC68HC912D60A — Rev. 3.1222 Pulse Width Modulator Freescale Semiconductor13.4 PWM Boundary CasesThe boundary con

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 223 Technical Data — MC68HC912D60ASection 14. Enhanced Capture T

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1224 Enhanced Capture Timer Freescale SemiconductorThis design specification describes th

Enhanced Capture TimerIntroductionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 225 Figure 14-1. Timer Block D

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1226 Enhanced Capture Timer Freescale SemiconductorFigure 14-2. Timer Block Diagram in Qu

Enhanced Capture TimerIntroductionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 227 Figure 14-3. 8-Bit Pulse A

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1228 Enhanced Capture Timer Freescale SemiconductorFigure 14-4. 16-Bit Pulse Accumulators

Enhanced Capture TimerIntroductionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 229 Figure 14-5. Block Diagram

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor General Description 23 Technical Data — MC68HC912D60ASection 1. General Description1.1

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1230 Enhanced Capture Timer Freescale Semiconductor14.3 Enhanced Capture Timer Modes of

Enhanced Capture TimerEnhanced Capture Timer Modes of OperationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 2

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1232 Enhanced Capture Timer Freescale SemiconductorIf the corresponding NOVWx bit of the

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 233 At the same time the pu

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1234 Enhanced Capture Timer Freescale SemiconductorRead anytime but will always return $0

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 235 Read or write anytime.T

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1236 Enhanced Capture Timer Freescale SemiconductorRead or write anytime.TEN — Timer Enab

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 237 MCCNT register ($B6, $B

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1238 Enhanced Capture Timer Freescale SemiconductorTo operate the 16-bit pulse accumulato

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 239 Read or write anytime.T

General DescriptionTechnical Data MC68HC912D60A — Rev. 3.124 General Description Freescale Semiconductor1.3 Devices Covered in this DocumentThe MC68

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1240 Enhanced Capture Timer Freescale SemiconductorRDPT — Timer Port Drive ReductionThis

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 241 TFLG1 indicates when in

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1242 Enhanced Capture Timer Freescale SemiconductorTOF — Timer Overflow Flag Set when 16-

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 243 Depending on the TIOS b

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1244 Enhanced Capture Timer Freescale SemiconductorPAEN — Pulse Accumulator A System Enab

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 245 If the timer is not act

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1246 Enhanced Capture Timer Freescale SemiconductorThis bit is cleared automatically by a

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 247 Read: any time Write: a

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1248 Enhanced Capture Timer Freescale SemiconductorMODMC — Modulus Mode Enable0 = The cou

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 249 MCEN — Modulus Down-Cou

General DescriptionFeaturesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor General Description 25 • Analog-to-digital converters– 2 x 8

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1250 Enhanced Capture Timer Freescale SemiconductorPOLF3 – POLF0 — First Input Capture Po

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 251 Read: any timeWrite: an

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1252 Enhanced Capture Timer Freescale SemiconductorAn IC register is empty when it has be

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 253 the main timer contents

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1254 Enhanced Capture Timer Freescale Semiconductor0 = Queue Mode of Input Capture is ena

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 255 Read: any time (inputs

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1256 Enhanced Capture Timer Freescale SemiconductorRead or write any time.0 = Configures

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 257 1 = Pulse Accumulator B

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1258 Enhanced Capture Timer Freescale SemiconductorRead: any timeWrite: has no effect.The

Enhanced Capture TimerTimer RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Capture Timer 259 If a $0000 is written i

General DescriptionTechnical Data MC68HC912D60A — Rev. 3.126 General Description Freescale Semiconductor• Serial interfaces– Two asynchronous serial

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1260 Enhanced Capture Timer Freescale SemiconductorRead: any timeWrite: has no effect.The

Enhanced Capture TimerTimer and Modulus Counter Operation in Different ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Enhanced Ca

Enhanced Capture TimerTechnical Data MC68HC912D60A — Rev. 3.1262 Enhanced Capture Timer Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 263 Technical Data — MC68HC912D60ASection 15. Multiple Serial

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1264 Multiple Serial Interface Freescale Semiconductor15.3 Block diagramFigure 15-1.

Multiple Serial InterfaceSerial Communication Interface (SCI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1266 Multiple Serial Interface Freescale Semiconductor15.4.1 Data FormatThe serial da

Multiple Serial InterfaceSerial Communication Interface (SCI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1268 Multiple Serial Interface Freescale SemiconductorBTST — Reserved for test functio

Multiple Serial InterfaceSerial Communication Interface (SCI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface

General DescriptionOrdering InformationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor General Description 27 1.5 Ordering Information

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1270 Multiple Serial Interface Freescale SemiconductorIn the long mode, the SCI circui

Multiple Serial InterfaceSerial Communication Interface (SCI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1272 Multiple Serial Interface Freescale SemiconductorThe bits in these registers are

Multiple Serial InterfaceSerial Communication Interface (SCI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1274 Multiple Serial Interface Freescale SemiconductorPF — Parity Error FlagIndicates

Multiple Serial InterfaceSerial Communication Interface (SCI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1276 Multiple Serial Interface Freescale Semiconductor15.5 Serial Peripheral Interfac

Multiple Serial InterfaceSerial Peripheral Interface (SPI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 277

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1278 Multiple Serial Interface Freescale SemiconductorFigure 15-4. SPI Clock Format 0

Multiple Serial InterfaceSerial Peripheral Interface (SPI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 279

General DescriptionTechnical Data MC68HC912D60A — Rev. 3.128 General Description Freescale SemiconductorNOTE: SDBUG12 is a P & E Micro Product. I

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1280 Multiple Serial Interface Freescale Semiconductor15.5.4 Bidirectional Mode (MOMI

Multiple Serial InterfaceSerial Peripheral Interface (SPI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 281

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1282 Multiple Serial Interface Freescale SemiconductorNormally data is transferred mos

Multiple Serial InterfaceSerial Peripheral Interface (SPI)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 283

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1284 Multiple Serial Interface Freescale SemiconductorWCOL — Write Collision Status Fl

Multiple Serial InterfacePort SMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 285 some slave devices are ver

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1286 Multiple Serial Interface Freescale SemiconductorDDS2, DDS0 — Data Direction for

Multiple Serial InterfacePort SMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Multiple Serial Interface 287 RDPS2 — Reduce Drive of Po

Multiple Serial InterfaceTechnical Data MC68HC912D60A — Rev. 3.1288 Multiple Serial Interface Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 289 Technical Data — MC68HC912D60ASection 16. Freescale Inte

General DescriptionBlock DiagramsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor General Description 29 1.6 Block DiagramsFigure 1-1.

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1290 Freescale Interconnect Bus Freescale Semiconductorviolates the rules of Manchest

Freescale Interconnect BusBiphase codingMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 291 16.3.1 The push

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1292 Freescale Interconnect Bus Freescale SemiconductorFigure 16-2. Biphase coding an

Freescale Interconnect BusMessage validationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 293 Figure 16-3.

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1294 Freescale Interconnect Bus Freescale Semiconductor16.5.1 Controller detected er

Freescale Interconnect BusInterfacing to MI BusMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 295 Figure 16

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1296 Freescale Interconnect Bus Freescale Semiconductor16.7 MI Bus clock rateThe MI

Freescale Interconnect BusSCI0/MI Bus registersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 297 SC0BDH an

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1298 Freescale Interconnect Bus Freescale SemiconductorPT — MI Bus TxD0 polarityIf pa

Freescale Interconnect BusSCI0/MI Bus registersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 299 The bits

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor 3 MC68HC912D60AMC68HC912D60CMC68HC912D60PTechnical Data — Rev. 3.1Freescale reserves th

General DescriptionTechnical Data MC68HC912D60A — Rev. 3.130 General Description Freescale SemiconductorFigure 1-2. MC68HC912D60A 80-pin QFP Block Di

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1300 Freescale Interconnect Bus Freescale SemiconductorOR — Bit Error Flag0 = No bit

Freescale Interconnect BusSCI0/MI Bus registersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Freescale Interconnect Bus 301 RAF — Rec

Freescale Interconnect BusTechnical Data MC68HC912D60A — Rev. 3.1302 Freescale Interconnect Bus Freescale SemiconductorWRITE: Writes access the eight

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 303 Technical Data — MC68HC912D60ASection 17. MSCAN Controller17.1 Co

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1304 MSCAN Controller Freescale Semiconductorreal-time processing, reliable operation in the EM

MSCAN ControllerMessage StorageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 305 Figure 17-1. The CAN System17.4 Me

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1306 MSCAN Controller Freescale SemiconductorThe above behaviour cannot be achieved with a sing

MSCAN ControllerMessage StorageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 307 On reception, each message is check

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1308 MSCAN Controller Freescale SemiconductorFigure 17-2. User Model for Message Buffer Organiz

MSCAN ControllerMessage StorageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 309 An overrun condition occurs when bo

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Central Processing Unit 31 Technical Data — MC68HC912D60ASection 2. Central Processing

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1310 MSCAN Controller Freescale SemiconductorIf more than one buffer is scheduled for transmiss

MSCAN ControllerIdentifier Acceptance FilterMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 311 cause of the receiver

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1312 MSCAN Controller Freescale SemiconductorFigure 17-3. 32-bit Maskable Identifier Acceptance

MSCAN ControllerIdentifier Acceptance FilterMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 313 Figure 17-5. 8-bit Mas

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1314 MSCAN Controller Freescale Semiconductor17.6 InterruptsThe msCAN12 supports four interrup

MSCAN ControllerInterruptsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 315 17.6.1 Interrupt AcknowledgeInterrupts

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1316 MSCAN Controller Freescale Semiconductor17.7 Protocol Violation ProtectionThe msCAN12 wil

MSCAN ControllerLow Power ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 317 Mode and generate interrupts (regis

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1318 MSCAN Controller Freescale Semiconductoroperations whether the msCAN12 starts transmitting

MSCAN ControllerLow Power ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 319 Figure 17-6. SLEEP Request / Acknow

Central Processing UnitTechnical Data MC68HC912D60A — Rev. 3.132 Central Processing Unit Freescale SemiconductorFigure 2-1. Programming ModelAccumula

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1320 MSCAN Controller Freescale Semiconductor17.8.3 msCAN12 POWER_DOWN ModeThe msCAN12 is in P

MSCAN ControllerClock SystemMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 321 receives the frames being sent by itse

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1322 MSCAN Controller Freescale SemiconductorNOTE: If the system clock is generated from a PLL,

MSCAN ControllerClock SystemMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 323 Figure 17-8. Segments within the Bit T

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1324 MSCAN Controller Freescale Semiconductor17.11 Memory MapThe msCAN12 occupies 128 bytes in

MSCAN ControllerProgrammer’s Model of Message StorageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 325 17.12 Progra

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1326 MSCAN Controller Freescale SemiconductorNOTE: The foreground receive buffer can be read an

MSCAN ControllerProgrammer’s Model of Message StorageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 327 17.12.2 Iden

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1328 MSCAN Controller Freescale SemiconductorRTR — Remote transmission requestThis flag reflect

MSCAN ControllerProgrammer’s Model of Message StorageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 329 17.12.4 Data

Central Processing UnitData TypesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Central Processing Unit 33 Condition Code Register (CC

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1330 MSCAN Controller Freescale Semiconductor17.13 Programmer’s Model of Control Registers17.1

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 331 SLPAK — SLE

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1332 MSCAN Controller Freescale Semiconductor17.13.3 msCAN12 Module Control Register 1 (CMCR1)

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 333 17.13.4 ms

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1334 MSCAN Controller Freescale Semiconductor17.13.5 msCAN12 Bus Timing Register 1 (CBTR1).SAM

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 335 The bit tim

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1336 MSCAN Controller Freescale SemiconductorRWRNIF — Receiver Warning Interrupt FlagThis flag

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 337 BOFFIF — BU

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1338 MSCAN Controller Freescale Semiconductor17.13.7 msCAN12 Receiver Interrupt Enable Registe

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 339 RXFIE — Rec

Central Processing UnitTechnical Data MC68HC912D60A — Rev. 3.134 Central Processing Unit Freescale SemiconductorTable 2-1. M68HC12 Addressing Mode Su

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1340 MSCAN Controller Freescale Semiconductortransmission request was successfully aborted due

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 341 TXEIE2 – TX

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1342 MSCAN Controller Freescale SemiconductorIDHIT2 – IDHIT0 — Identifier Acceptance Hit Indica

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 343 17.13.12 m

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1344 MSCAN Controller Freescale SemiconductorAC7 – AC0 — Acceptance Code BitsAC7 – AC0 comprise

MSCAN ControllerProgrammer’s Model of Control RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor MSCAN Controller 345 17.13.14 m

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1346 MSCAN Controller Freescale SemiconductorAM7 – AM0 — Acceptance Mask BitsIf a particular bi

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1347 MSCAN Controller Freescale Semiconductor17.13.16 msCAN12 Port CAN Data Register (PORTCAN)

MSCAN ControllerTechnical Data MC68HC912D60A — Rev. 3.1348 MSCAN Controller Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 349 Technical Data — MC68HC912D60ASection 18. Analog-to-Dig

Central Processing UnitIndexed Addressing ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Central Processing Unit 35 2.6 Indexed

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1350 Analog-to-Digital Converter Freescale Semiconductor18.2.1 Features• 8/10 Bit R

Analog-to-Digital ConverterModes of OperationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 351 18.3 Mode

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1352 Analog-to-Digital Converter Freescale Semiconductor•WAIT is executed (if the AS

Analog-to-Digital ConverterFunctional DescriptionMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 353 18.4.3

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1354 Analog-to-Digital Converter Freescale Semiconductorprogrammable constant in ord

Analog-to-Digital ConverterATD Operation In Different MCU ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Conver

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1356 Analog-to-Digital Converter Freescale Semiconductor18.6.2 WAIT ModeIf the ASWA

Analog-to-Digital ConverterGeneral Purpose Digital Input Port OperationMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digita

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1358 Analog-to-Digital Converter Freescale Semiconductor18.8 Application Considerat

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 359 18.9.1 ATD Con

Central Processing UnitTechnical Data MC68HC912D60A — Rev. 3.136 Central Processing Unit Freescale Semiconductor2.7 Opcodes and OperandsThe CPU12 us

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1360 Analog-to-Digital Converter Freescale SemiconductorThis bit provides program on

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 361 exited, the ATD

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1362 Analog-to-Digital Converter Freescale SemiconductorASCIE — ATD Sequence Complet

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 363 READ: any timeW

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1364 Analog-to-Digital Converter Freescale SemiconductorFinally, which result regist

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 365 RES10 — A/D Res

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1366 Analog-to-Digital Converter Freescale Semiconductor18.9.4 ATDCTL5 ATD Control

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 367 The result regi

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1368 Analog-to-Digital Converter Freescale Semiconductormode is required, the existi

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 369 Table 18-8 list

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 37 Technical Data — MC68HC912D60ASection 3. Pinout and S

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1370 Analog-to-Digital Converter Freescale SemiconductorTable 18-10. Multichannel Mo

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 371 8 channel conve

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1372 Analog-to-Digital Converter Freescale Semiconductor18.9.5 ATDSTAT A/D Status R

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 373 the result is a

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1374 Analog-to-Digital Converter Freescale Semiconductor18.9.6 ATDTEST Module Test

Analog-to-Digital ConverterATD RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Analog-to-Digital Converter 375 Resetting to id

Analog-to-Digital ConverterTechnical Data MC68HC912D60A — Rev. 3.1376 Analog-to-Digital Converter Freescale Semiconductor18.9.8 ADRx A/D Conversion

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 377 Technical Data — MC68HC912D60ASection 19. Development Support19

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1378 Development Support Freescale SemiconductorProgram information is fetched a few cycles

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 379 19.4 Background Debug

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.138 Pinout and Signal Descriptions Freescale Semiconductor3.2 MC68HC912D60A Pin

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1380 Development Support Freescale SemiconductorIn special single-chip mode, background oper

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 381 BKGD pin during host-to

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1382 Development Support Freescale SemiconductorFigure 19-2 shows the host receiving a logic

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 383 19.4.3 BDM CommandsThe

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1384 Development Support Freescale SemiconductorThe second type of BDM commands are firmware

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 385 Each of the hardware an

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1386 Development Support Freescale SemiconductorThe external host should delay about 32 targ

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 387 program other bits of t

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1388 Development Support Freescale Semiconductor• The ADDRESS register is temporary storage

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 389 BDMACT — Background Mod

Pinout and Signal DescriptionsMC68HC912D60A Pin Assignments in 112-pin QFPMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Si

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1390 Development Support Freescale SemiconductorCLKSW — BDMCLK Clock Switch0 = BDM system op

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 391 DATA — Data Flag - Show

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1392 Development Support Freescale SemiconductorR/W — Read/Write Flag0 = Write1 = ReadTTAGO

Development SupportBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 393 19.4.5.3 SHIFTER This

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1394 Development Support Freescale Semiconductor19.4.5.4 ADDRESS This 16-bit address regist

Development SupportBreakpointsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 395 19.4.5.5 CCRSAV The CCRSAV regis

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1396 Development Support Freescale Semiconductor19.5.1 Breakpoint ModesThree modes of opera

Development SupportBreakpointsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 397 • There is no hardware to enforce

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1398 Development Support Freescale SemiconductorTo trace program flow, setting the BKPM bit

Development SupportBreakpointsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 399 BK0ALE — Breakpoint 0 Range Contr

Technical Data MC68HC912D60A — Rev. 3.14 Freescale Semiconductor

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.140 Pinout and Signal Descriptions Freescale Semiconductor3.3 MC68HC912D60A Pin

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1400 Development Support Freescale SemiconductorBKMBL — Breakpoint Mask LowDisables the matc

Development SupportBreakpointsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Development Support 401 These bits are used to compare ag

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1402 Development Support Freescale SemiconductorThese bits are compared to the most signific

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1403 Development Support Freescale SemiconductorTAGHI signal shares a pin with the BKGD sig

Development SupportTechnical Data MC68HC912D60A — Rev. 3.1404 Development Support Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 405 Technical Data — MC68HC912D60ASection 20. Electrical Spec

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1406 Electrical Specifications Freescale Semiconductor20.3 Tables of DataTable 20-1.

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 407 Table 20-2. Therma

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1408 Electrical Specifications Freescale SemiconductorTable 20-3. DC Electrical Charac

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 409 Table 20-4. Supply

Pinout and Signal DescriptionsMC68HC912D60A Pin Assignments in 80-pin QFPMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Sig

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1410 Electrical Specifications Freescale SemiconductorTable 20-6. Analog Converter Cha

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 411 .Table 20-8. ATD M

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1412 Electrical Specifications Freescale SemiconductorTable 20-10. Flash EEPROM Charac

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 413 NOTE: RESET is rec

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1414 Electrical Specifications Freescale SemiconductorFigure 20-1. Timer InputsPT72PT7

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 415 Figure 20-2. POR a

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1416 Electrical Specifications Freescale SemiconductorFigure 20-3. STOP Recovery Timin

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 417 Figure 20-4. WAIT

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1418 Electrical Specifications Freescale SemiconductorFigure 20-5. Interrupt Timing Di

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 419 Figure 20-6. Port

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.142 Pinout and Signal Descriptions Freescale Semiconductor3.4 Power Supply PinsM

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1420 Electrical Specifications Freescale SemiconductorTable 20-14. Multiplexed Expansi

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 421 Figure 20-8. Multi

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1422 Electrical Specifications Freescale SemiconductorTable 20-15. SPI Timing(VDD = 5.

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 423 A) SPI Master Timi

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1424 Electrical Specifications Freescale SemiconductorA) SPI Slave Timing (CPHA = 0)B)

Electrical SpecificationsTables of DataMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Electrical Specifications 425 Table 20-16. CGM C

Electrical SpecificationsTechnical Data MC68HC912D60A — Rev. 3.1426 Electrical Specifications Freescale SemiconductorTable 20-18. Key Wake-upVDD = 5.

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Appendix: CGM Practical Aspects 427 Technical Data — MC68HC912D60ASection 21. Appendix:

Appendix: CGM Practical AspectsTechnical Data MC68HC912D60A — Rev. 3.1428 Appendix: CGM Practical Aspects Freescale Semiconductorsynchronizers would

Appendix: CGM Practical AspectsPractical Aspects For The PLL UsageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Appendix: CGM Practic

Pinout and Signal DescriptionsPower Supply PinsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 43 3.4.5

Appendix: CGM Practical AspectsTechnical Data MC68HC912D60A — Rev. 3.1430 Appendix: CGM Practical Aspects Freescale SemiconductorThe filter component

Appendix: CGM Practical AspectsPractical Aspects For The PLL UsageMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Appendix: CGM Practic

Appendix: CGM Practical AspectsTechnical Data MC68HC912D60A — Rev. 3.1432 Appendix: CGM Practical Aspects Freescale SemiconductorTable 21-2. Suggeste

Appendix: CGM Practical AspectsPrinted Circuit Board GuidelinesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Appendix: CGM Practical

Appendix: CGM Practical AspectsTechnical Data MC68HC912D60A — Rev. 3.1434 Appendix: CGM Practical Aspects Freescale Semiconductorspectrum. This is es

Appendix: CGM Practical AspectsPrinted Circuit Board GuidelinesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Appendix: CGM Practical

Appendix: CGM Practical AspectsTechnical Data MC68HC912D60A — Rev. 3.1436 Appendix: CGM Practical Aspects Freescale Semiconductor• Mount the PLL filt

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Appendix: Changes from MC68HC912D60 437 Technical Data — MC68HC912D60ASection 22. Appen

Appendix: Changes from MC68HC912D60Technical Data MC68HC912D60A — Rev. 3.1438 Appendix: Changes from MC68HC912D60 Freescale Semiconductor22.2.1.3 Fl

Appendix: Changes from MC68HC912D60Significant changes from the MC68HC912D60 (non-suffix device)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semic

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.144 Pinout and Signal Descriptions Freescale Semiconductor3.5 Signal Description

Appendix: Changes from MC68HC912D60Technical Data MC68HC912D60A — Rev. 3.1440 Appendix: Changes from MC68HC912D60 Freescale Semiconductor22.2.4 WAIT

Appendix: Changes from MC68HC912D60Significant changes from the MC68HC912D60 (non-suffix device)MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semic

Appendix: Changes from MC68HC912D60Technical Data MC68HC912D60A — Rev. 3.1442 Appendix: Changes from MC68HC912D60 Freescale SemiconductorTo ensure co

MC68HC912D60A — Rev. 3.1 Technical DataFreescale SemiconductorAppendix: Information on MC68HC912D60A Mask Set Changes 443 Technical Data — MC68HC912D6

Appendix: Information on MC68HC912D60A Mask Technical Data MC68HC912D60A — Rev. 3.1444 Appendix: Information on MC68HC912D60A Mask Set Changes Freesc

Appendix: Information on MC68HC912D60A Mask Set ChangesPLLMC68HC912D60A — Rev. 3.1 Technical DataFreescale SemiconductorAppendix: Information on MC68H

Appendix: Information on MC68HC912D60A Mask Technical Data MC68HC912D60A — Rev. 3.1446 Appendix: Information on MC68HC912D60A Mask Set Changes Freesc

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Glossary 447 Technical Data — MC68HC912D60AGlossaryA — See “accumulators (A and B or D)

GlossaryTechnical Data MC68HC912D60A — Rev. 3.1448 Glossary Freescale Semiconductorbinary-coded decimal (BCD) — A notation that uses 4-bit binary num

GlossaryMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Glossary 449 computer operating properly module (COP) — A counter module that r

Pinout and Signal DescriptionsSignal DescriptionsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 45 NOTE

GlossaryTechnical Data MC68HC912D60A — Rev. 3.1450 Glossary Freescale Semiconductorcycle time — The period of the operating frequency: tCYC=1/fOP.D —

GlossaryMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Glossary 451 input/output (I/O) — Input/output interfaces between a computer sy

GlossaryTechnical Data MC68HC912D60A — Rev. 3.1452 Glossary Freescale Semiconductormemory location — Each M68HC12 memory location holds one byte of d

GlossaryMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Glossary 453 operand — Data on which an operation is performed. Usually a state

GlossaryTechnical Data MC68HC912D60A — Rev. 3.1454 Glossary Freescale Semiconductorprogram counter (PC) — A 16-bit register in the CPU. The PC regist

GlossaryMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Glossary 455 shift register — A chain of circuits that can retain the logic lev

GlossaryTechnical Data MC68HC912D60A — Rev. 3.1456 Glossary Freescale Semiconductortwo’s complement — A means of performing binary subtraction using

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Revision History 457 Technical Data — MC68HC912D60ARevision History23.8 Contents23.9 C

Revision HistoryTechnical Data MC68HC912D60A — Rev. 3.1458 Revision History Freescale Semiconductor23.11 Major Changes From Rev 0.0 to Rev 1.0The Ad

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.146 Pinout and Signal Descriptions Freescale Semiconductoroutput to indicate that

How to Reach Us:Home Page:www.freescale.comE-mail:[email protected]/Europe or Locations Not Listed:Freescale SemiconductorTechnical Information

Pinout and Signal DescriptionsSignal DescriptionsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 47 vect

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.148 Pinout and Signal Descriptions Freescale Semiconductor3.5.6 Mode Select (SMO

Pinout and Signal DescriptionsSignal DescriptionsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 49 3.5.

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor List of Paragraphs 5 Technical Data — MC68HC912D60AList of ParagraphsList of Paragraphs

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.150 Pinout and Signal Descriptions Freescale Semiconductor3.5.13 Inverted ECLK (

Pinout and Signal DescriptionsSignal DescriptionsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 51 ADDR

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.152 Pinout and Signal Descriptions Freescale Semiconductor3.6 Port SignalsThe MC

Pinout and Signal DescriptionsPort SignalsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 53 which can b

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.154 Pinout and Signal Descriptions Freescale SemiconductorWhen the PUPB bit in th

Pinout and Signal DescriptionsPort SignalsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 55 3.6.4 Port

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.156 Pinout and Signal Descriptions Freescale Semiconductorconfigured for output.

Pinout and Signal DescriptionsPort SignalsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 57 Port AD1 pi

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.158 Pinout and Signal Descriptions Freescale Semiconductor3.6.10 Port SPort S is

Pinout and Signal DescriptionsPort SignalsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Pinout and Signal Descriptions 59 Setting the

List of ParagraphsTechnical Data MC68HC912D60A — Rev. 3.16 List of Paragraphs Freescale SemiconductorSection 17. MSCAN Controller. . . . . . . . . .

Pinout and Signal DescriptionsTechnical Data MC68HC912D60A — Rev. 3.160 Pinout and Signal Descriptions Freescale Semiconductor3.6.12 Port Pull-Up Pu

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Registers 61 Technical Data — MC68HC912D60ASection 4. Registers4.1 Contents4.2 Registe

RegistersTechnical Data MC68HC912D60A — Rev. 3.162 Registers Freescale SemiconductorAddressBit 7654321Bit 0Name$0 00 0 PA 7 PA6 PA5 PA 4 PA3 PA2 PA1

RegistersRegister BlockMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Registers 63 $0021 0 BKDBE BKMBH BKMBL BK1RWE BK1RW BK0RWE BK0RW

RegistersTechnical Data MC68HC912D60A — Rev. 3.164 Registers Freescale Semiconductor$004BBit 7654321Bit 0PWCNT3$004CBit 7654321Bit 0PWPER0$004DBit 76

RegistersRegister BlockMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Registers 65 $0072 Bit 15 14 13 12 11 10 9 Bit 8 ADR01H$0073Bit

RegistersTechnical Data MC68HC912D60A — Rev. 3.166 Registers Freescale Semiconductor$0096 Bit 15 14 13 12 11 10 9 Bit 8 TC3$0097Bit 7654321Bit 0TC3$0

RegistersRegister BlockMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Registers 67 $00BA Bit 15 14 13 12 11 10 9 Bit 8 TC1H$00BBBit 76

RegistersTechnical Data MC68HC912D60A — Rev. 3.168 Registers Freescale Semiconductor$00EF EEDIV7 EEDIV6 EEDIV5 EEDIV4 EEDIV3 EEDIV2 EEDIV1 EEDIV0 EED

RegistersRegister BlockMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Registers 69 $0119 AC7 AC6 AC5 AC4 AC3 AC2 AC1 AC0 CIDAR5$011A A

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Table of Contents 7 Technical Data — MC68HC912D60ATable of ContentsTechnical Data — Lis

RegistersTechnical Data MC68HC912D60A — Rev. 3.170 Registers Freescale Semiconductor$01F0 Bit 15 14 13 12 11 10 9 Bit 8 ADR10H$01F1Bit 7Bit 6000000AD

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resource Mapping 71 Technical Data — MC68HC912D60ASection 5. Operat

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.172 Operating Modes and Resource Mapping Freescale SemiconductorThe states

Operating Modes and Resource MappingOperating ModesMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resource Mapping

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.174 Operating Modes and Resource Mapping Freescale SemiconductorSpecial Exp

Operating Modes and Resource MappingBackground Debug ModeMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resource M

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.176 Operating Modes and Resource Mapping Freescale SemiconductorESTR — E Cl

Operating Modes and Resource MappingInternal Resource MappingMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resour

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.178 Operating Modes and Resource Mapping Freescale Semiconductordata. It is

Operating Modes and Resource MappingInternal Resource MappingMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resour

Table of ContentsTechnical Data MC68HC912D60A — Rev. 3.18 Table of Contents Freescale SemiconductorSection 3. Pinout and Signal Descriptions3.1 Conte

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.180 Operating Modes and Resource Mapping Freescale Semiconductor5.5.3 EEPR

Operating Modes and Resource MappingInternal Resource MappingMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resour

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.182 Operating Modes and Resource Mapping Freescale SemiconductorRFSTR1, RFS

Operating Modes and Resource MappingMemory MapsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Operating Modes and Resource Mapping 83

Operating Modes and Resource MappingTechnical Data MC68HC912D60A — Rev. 3.184 Operating Modes and Resource Mapping Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Bus Control and Input/Output 85 Technical Data — MC68HC912D60ASection 6. Bus Control an

Bus Control and Input/OutputTechnical Data MC68HC912D60A — Rev. 3.186 Bus Control and Input/Output Freescale Semiconductorthat was accessed is on the

Bus Control and Input/OutputRegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Bus Control and Input/Output 87 Bits PA[7:0] are a

Bus Control and Input/OutputTechnical Data MC68HC912D60A — Rev. 3.188 Bus Control and Input/Output Freescale SemiconductorBits PB[7:0] are associated

Bus Control and Input/OutputRegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Bus Control and Input/Output 89 This register is a

Table of ContentsMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Table of Contents 9 7.2 Introduction. . . . . . . . . . . . . . . . .

Bus Control and Input/OutputTechnical Data MC68HC912D60A — Rev. 3.190 Bus Control and Input/Output Freescale Semiconductor0 = Associated pin is a hig

Bus Control and Input/OutputRegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Bus Control and Input/Output 91 In normal expanded

Bus Control and Input/OutputTechnical Data MC68HC912D60A — Rev. 3.192 Bus Control and Input/Output Freescale SemiconductorPIPOE — Pipe Status Signal

Bus Control and Input/OutputRegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Bus Control and Input/Output 93 RDWE — Read/Write

Bus Control and Input/OutputTechnical Data MC68HC912D60A — Rev. 3.194 Bus Control and Input/Output Freescale SemiconductorThese bits select pull-up r

Bus Control and Input/OutputRegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Bus Control and Input/Output 95 These bits select

Bus Control and Input/OutputTechnical Data MC68HC912D60A — Rev. 3.196 Bus Control and Input/Output Freescale Semiconductor

MC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Flash Memory 97 Technical Data — MC68HC912D60ASection 7. Flash Memory7.1 Contents7.2 I

Flash MemoryTechnical Data MC68HC912D60A — Rev. 3.198 Flash Memory Freescale Semiconductor7.3 OverviewThe Flash EEPROM array is arranged in a 16-bit

Flash MemoryFlash EEPROM RegistersMC68HC912D60A — Rev. 3.1 Technical DataFreescale Semiconductor Flash Memory 99 7.6 Flash EEPROM RegistersIn normal